A ok

doc/main.tex

@@ -17,112 +17,6 @@
 \section{Introduction}
 This document provides a detailed description of the 1-bit full adder module implemented in Verilog. A full adder is a digital circuit that performs the addition of binary numbers. In this design, the module takes three inputs: two single-bit binary values, \texttt{a} and \texttt{b}, and a carry-in bit, \texttt{carry\_in}. It produces two outputs: the sum (\texttt{sum}) and a carry-out bit (\texttt{carry\_out}).
 
-\section*{Installing Yosys and nextpnr from Source}
-
-Yosys and nextpnr are open-source tools for digital synthesis and place-and-route. The following steps guide you through building and installing these tools from source.
-
-\subsection*{Yosys Installation}
-
-\begin{enumerate}
-    \item \textbf{Clone the Yosys repository:} Begin by cloning the Yosys repository from GitHub.
-    \begin{verbatim}
-    git clone https://github.com/YosysHQ/yosys.git
-    \end{verbatim}
-
-    \item \textbf{Install dependencies:} Ensure all necessary dependencies are installed by running:
-    \begin{verbatim}
-    sudo apt-get install build-essential clang lld bison flex \
-    libreadline-dev gawk tcl-dev libffi-dev git \
-    graphviz xdot pkg-config python3 libboost-system-dev \
-    libboost-python-dev libboost-filesystem-dev zlib1g-dev
-    \end{verbatim}
-
-    \item \textbf{Configure Yosys to use Clang:} In the Yosys directory, configure it to use the Clang compiler.
-    \begin{verbatim}
-    make config-clang
-    \end{verbatim}
-
-    \item \textbf{Initialize submodules:} Ensure all Git submodules are up to date.
-    \begin{verbatim}
-    git submodule update --init
-    \end{verbatim}
-
-    \item \textbf{Build Yosys:} Compile Yosys using multiple threads.
-    \begin{verbatim}
-    make -j32
-    \end{verbatim}
-
-    \item \textbf{Install Yosys:} After the build is complete, install Yosys system-wide.
-    \begin{verbatim}
-    sudo make install
-    \end{verbatim}
-\end{enumerate}
-
-\subsection*{icestorm Installation}
-
-\begin{enumerate}
-    \item \textbf{Clone the icestorm repository:} Download the icestorm repository from GitHub.
-    \begin{verbatim}
-    git clone https://github.com/YosysHQ/icestorm
-    \end{verbatim}
-
-    \item \textbf{Build icestorm:} Navigate to the icestorm directory and compile the project using all available processor cores.
-    \begin{verbatim}
-    cd icestorm/
-    make -j$(nproc)
-    \end{verbatim}
-
-    \item \textbf{Install icestorm:} After the build is complete, install icestorm system-wide.
-    \begin{verbatim}
-    sudo make install
-    \end{verbatim}
-\end{enumerate}
-
-\subsection*{nextpnr Installation}
-
-\begin{enumerate}
-    \item \textbf{Navigate back to the parent directory:}
-    \begin{verbatim}
-    cd ../
-    \end{verbatim}
-
-    \item \textbf{Clone the nextpnr repository:} Download the nextpnr repository from GitHub.
-    \begin{verbatim}
-    git clone https://github.com/YosysHQ/nextpnr
-    \end{verbatim}
-
-    \item \textbf{Install dependencies:} Install additional libraries needed for nextpnr.
-    \begin{verbatim}
-    sudo apt install cmake libeigen3-dev libftdi-dev
-    \end{verbatim}
-
-    \item \textbf{Configure nextpnr for the iCE40 architecture:} In the nextpnr directory, run cmake with the iCE40 architecture option. This will also integrate Icestorm.
-    \begin{verbatim}
-    cd nextpnr/
-    cmake . -DARCH=ice40
-    \end{verbatim}
-
-    \item \textbf{Build nextpnr:} Compile nextpnr using all available processor cores.
-    \begin{verbatim}
-    make -j$(nproc)
-    \end{verbatim}
-
-    \item \textbf{Install nextpnr:} Once the build completes, install nextpnr system-wide.
-    \begin{verbatim}
-    sudo make install
-    \end{verbatim}
-\end{enumerate}
-
-\subsection*{Verification}
-
-After installing Yosys and nextpnr, verify the installation by running:
-\begin{verbatim}
-yosys -V
-nextpnr-ice40 --help
-\end{verbatim}
-These commands should display version or help information, confirming that the tools are correctly installed.
-
-
 \section{Module Description}
 The 1-bit full adder module is defined in Verilog using the following interface:
 

sum.pcf

@@ -1,4 +1,4 @@
-set_io a 12         # Przycisk A (Button 3)
+set_io a 20         # Przycisk A (Button 3)
 set_io b 11         # Przycisk B (Button 2)
 set_io carry_in 10  # Przycisk Carry-in (Button 1)
 
@@ -6,5 +6,5 @@ set_io sum 39       # Wyjście suma na diodzie L1
 set_io carry_out 40 # Wyjście carry-out na diodzie L2
 set_io l3 41        # Dioda L3 dla wejścia B
 set_io l4 42        # Dioda L4 dla carry_in
-set_io l5 37        # Dioda L5 dla wejścia A
+set_io l5 23    # Dioda L5 dla wejścia A